Python developer állás, munka

• FPGA tervek és tesztek fejlesztése VHDL, Verilog és HLS (High-Level Synthesis) használatával, FPGA tervek ellenőrzése.
• Xilinx eszköztár használata (Kintex Ultrascale, Zynq Ultrascale+ SoC, Versal).

Contribute in SystemVerilog RTL verification and debug; formal bring-up of non-trivial IP blocks to achieve required quality levels (SystemVerilog/UVM, Formal, scripting) Work closely with engineers across design, performance modelling, validation, and implementation to meet all functional...

Develop and execute test plans and verification methodologies for SoC-level designs. Complete functional verification to the required quality standards and schedules. Collaborate with project leads and management on planning, scheduling, and quality checkpoints. Ensure progress and quality of SoC...