Állás részletei
-
Cég neve
ARM Hungary Kft.
-
Munkavégzés helye
Hibrid • Austin -
Munkaidő, foglalkoztatás jellege
- Teljes munkaidő
- Általános munkarend
-
Elvárások
- Nem kell nyelvtudás
- 5-10 év tapasztalat
- Főiskola
Állás elmentve
A hirdetést eltávolítottuk a mentett állásai közül.
Állás leírása
Responsibilities
Create, optimize, and verify custom digital standard cell layouts, realizing advanced IP in the latest process technologies.
Work within the Solutions Engineering Group on custom cell development, and customer-specific design solutions.
Collaborate with circuit design and implementation teams to ensure performance, usability, reliability, and alignment with PDK constraints.
Develop and/or aid in layout methodologies, automation scripts, and standard processes to improve productivity and consistency.
Conduct full physical verification including DRC, LVS, ERC, and support resolution of verification issues.
Drive continuous improvement in cell architecture, design rules understanding, and layout quality for next-generation processes.
Work within the Solutions Engineering Group on custom cell development, and customer-specific design solutions.
Collaborate with circuit design and implementation teams to ensure performance, usability, reliability, and alignment with PDK constraints.
Develop and/or aid in layout methodologies, automation scripts, and standard processes to improve productivity and consistency.
Conduct full physical verification including DRC, LVS, ERC, and support resolution of verification issues.
Drive continuous improvement in cell architecture, design rules understanding, and layout quality for next-generation processes.
Requirements
Associate’s degree in Electrical Engineering, Microelectronics, related field or experience.
5+ years of hands-on mask/layout design experience in semiconductor or ASIC development.
Expert proficiency with Cadence Virtuoso and deep experience with advanced layout techniques.
Experience building or enhancing standard cell libraries or high-performance custom circuits.
Familiarity with EM/IR, reliability constraints, and design-for-manufacturability (DFM) practices.
Strong understanding of semiconductor device physics, PDK constraints, and layout-dependent effects (LDE).
Proven experience performing DRC, LVS and handling signoff-quality verification flows. Interpretation of reports and debugging.
Experience designing in advanced nodes (5nm and below).
Ability to interpret schematics, floorplans, and design constraints and translate them into optimized layouts.
Strategically plan and develop layouts with an eye towards maximum reuse across multiple architectures.
Excellent communication and cross-team collaboration skills.
5+ years of hands-on mask/layout design experience in semiconductor or ASIC development.
Expert proficiency with Cadence Virtuoso and deep experience with advanced layout techniques.
Experience building or enhancing standard cell libraries or high-performance custom circuits.
Familiarity with EM/IR, reliability constraints, and design-for-manufacturability (DFM) practices.
Strong understanding of semiconductor device physics, PDK constraints, and layout-dependent effects (LDE).
Proven experience performing DRC, LVS and handling signoff-quality verification flows. Interpretation of reports and debugging.
Experience designing in advanced nodes (5nm and below).
Ability to interpret schematics, floorplans, and design constraints and translate them into optimized layouts.
Strategically plan and develop layouts with an eye towards maximum reuse across multiple architectures.
Excellent communication and cross-team collaboration skills.
Nice-to-have
Nice to Have Skills and Experience: Familiarity with scripting for layout automation (e.g., SKILL, Tcl, Python), Background working directly with process engineering teams or supporting early-node technology enablement, Beyond basic user knowledge of additional EDA tools such as Calibre, Assura, Pegasus, or similar, Accommodations during recruitment process available upon request, Arm is an equal opportunity employer committed to diversity and inclusion
What we offer
Salary Range: $136,400-$184,600 per year
Hybrid working environment with flexibility depending on team needs
Comprehensive benefits including health and wellness, work-life success, financial rewards, and development support
Hybrid working environment with flexibility depending on team needs
Comprehensive benefits including health and wellness, work-life success, financial rewards, and development support
Company info
You know us. With 125 Arm-powered products shipped every second, more than 70% of the world’s population touches Arm technology. Our hardware engineers are a dynamic force driving innovation across various domains. Whether it’s powering your smartphone, delivering award-winning VR gaming, or developing the foundation for the world's fastest supercomputer – our engineers are designing the advanced core processors leading the race toward a connected, autonomous, hyper-performance future.
From advancing core implementation to developing full custom physical IP, Arm hardware engineering pushes the limits in vital areas, such as memory, IO, and logic, to shape the future of technology.
How to apply
You can submit your application on the company's website, which you can access by clicking the „Apply on company page“ button.
Állás, munka területe(i)
Álláshirdetés jelentése